一种片内电流模比较增强型上电复位电路  

An Integrated Enforced Current Mode Comparison Power-On Reset Circuit

作　　者：李凡阳[1] 杨涛[1] 

机构地区：[1]福州大学福建省集成电路设计中心,福州市350000

出　　处：《微电子学》2015年第1期63-66,71,共5页Microelectronics

摘　　要：介绍了一种片内电流模比较增强型上电复位电路。与传统的片内上电复位电路相比,该上电复位电路避免了二极管复位电路复位信号不彻底和基准增强型上电复位电路较复杂的缺点,利用简单的二极管箝位模块、电流模比较模块和逻辑电平迟滞模块,增强了上电复位信号,有利于后续逻辑单元的翻转。电路采用标准0.35μm CMOS工艺进行设计和流片。芯片样品电路测试结果表明,在3.3V电源电压下,电路工作正常,其上电复位逻辑高电平约2.3V,比普通二极管复位电路高约0.8V,有利于后续逻辑单元的翻转,且电路结构比基准型复位电路简单。An integrated enforced current mode comparison power-on reset circuit was introduced.Compared with the conventional power-on reset circuit,by the means of diode’s clamping,current mode comparison and logic hysteresis blocks,the power-on reset circuit had enforced the resetting with the power-on power supply signal and eliminated the drawbacks of the conventional reset circuit.Specifically,the circuit harvested the proper range of the reset voltage with the clamping block,and the current mode block was used to obtain the reset logic signal.And furthermore,the hysteresis block would increase the value of the reset logic signal.The circuit was implemented and fabricated in 0.35 #m standard CMOS process.The circuit worked well with the supply voltage of 3.3 V.The measured results showed that the power-on reset circuit’s high logic voltage was about 2.3V,0.8Vhigher than that of the normal diode reset circuit,benefiting turning on and off the subsequent logic cells.Moreover,compared with the reference reset circuit,the proposed architecture was simple.

关 键 词：上电复位电路 箝位 电流模比较 逻辑电平迟滞 

分 类 号：TN432[电子电信—微电子学与固体电子学]