一种6 Gbit/s低功耗低抖动电压模发送器  

A 6 Gbit / s Voltage Mode Transmitter with Low-Power and Low-Jitter

作　　者：吕俊盛[1] 田泽[1] 邵刚[1] 

机构地区：[1]中国航空工业集团公司西安航空计算技术研究所,西安710068

出　　处：《半导体技术》2015年第3期188-194,221,共8页Semiconductor Technology

摘　　要：提出了一种应用于高速串行链路中的基于二阶预加重和阻抗校正技术的6 Gbit/s低功耗低抖动电压模(VM)发送器。在综合分析阻抗、供电电流和输出驱动器预加重等因素影响的基础上,采用了多种技术来提高发送器的信号完整性,主要包括:设计了一种阻抗校正电路(ICU)以保证50Ω的输出阻抗并抑制信号反射,提出了一种自偏置稳压器用来稳定电源电压,同时设计了一种信号边沿驱动器用以加速信号的转换时间。最终,整个发送器在65 nm CMOS工艺平台进行设计。后仿真结果表明,发送器工作在6 Gbit/s时,远端输出眼图高度大于800 m V,均方根抖动小于2.70 ps。发送器的功耗为16.1 m A,占用面积仅为370μm×230μm。A 6 Gbit / s low power and low jitter voltage mode（ VM） transmitter with 2-tap pre-emphasis and impedance calibration for high speed serial links was proposed. Based on a comprehensive analysis of the relationship among impedance,supply current and pre-emphasis of the output driver,an impedance control circuit（ ICU） was designed to maintain the 50 Ω output impedance and suppress the reflection,a self-biased regulator was proposed to regulate the power supply,and an edge driver was introduced to speed up the signal transition time. Therefore,the signal integrity（ SI） of the transmitter was improved with low power consumption. The transmitter was designed in 65 nm CMOS technology. The simulation results show that an eye height is greater than 800 m V at far end with the root mean square jitter less than 2. 70 ps at 6 Gbit / s. The power dissipation of transmitter is 16. 1 m A and the size is only 370 μm × 230 μm.

关 键 词：高速串行链路 低功耗 低抖动 电压模(VM) 发送器 

分 类 号：TN492[电子电信—微电子学与固体电子学]