Investigation on the layout strategy of gg NMOS ESD protection devices for uniform conduction behavior and optimal width scaling  

作　　者：LU GuangYi WANG Yuan ZHANG LiZhong CAO Jian JIA Song ZHANG Xing 

机构地区：[1]Institute of Microelectronics, Peking University [2]Innovation Center for Micro/Nanoelectronics and Integrated System

出　　处：《Science China(Information Sciences)》2015年第4期130-138,共9页中国科学（信息科学）（英文版）

基　　金：supported by National Basic Research Program of China (973 Program) (Grant No. 2011CBA00606);Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61106101)

摘　　要：Gate-grounded NMOS （ggNMOS） transistors have widely served as electro-static discharge （ESD） protection devices for integrated circuits. The layout strategy of ggNMOS greatly influences its ESD protection characteristics. Layout strategies forvariation of the number of substrate-pickup stripes are investigated in this paper. Direct current and transmission-line pulsing test results are presented to verify that adjustable holding voltages are accessed by variation of the number of substrate-pickup stripes. The design with two evenly distributed substrate-pickup stripes among different fingers is found to exhibit the highest second break current and optimal width-scaling characteristics.Gate-grounded NMOS （ggNMOS） transistors have widely served as electro-static discharge （ESD） protection devices for integrated circuits. The layout strategy of ggNMOS greatly influences its ESD protection characteristics. Layout strategies forvariation of the number of substrate-pickup stripes are investigated in this paper. Direct current and transmission-line pulsing test results are presented to verify that adjustable holding voltages are accessed by variation of the number of substrate-pickup stripes. The design with two evenly distributed substrate-pickup stripes among different fingers is found to exhibit the highest second break current and optimal width-scaling characteristics.

关 键 词：gate-grounded NMOS （ggNMOS） electro-static discharge （ESD） triggering voltage holding voltage second breakdown current 

分 类 号：TN386[电子电信—物理电子学]