FPGA/DSP高速稳定雷达发射机设计  

Design of high-speed stability radar transmitter based on FPGA/DSP

作　　者：张春杰[1] 王鹏[1] 谭振伟[1] 

机构地区：[1]哈尔滨工程大学信息与通信工程学院,黑龙江哈尔滨150001

出　　处：《应用科技》2015年第1期6-9,14,共5页Applied Science and Technology

基　　金：国家自然科学基金资助项目(61301199)

摘　　要：针对采用直接数字式频率合成（DDS）芯片无法直接产生多种信号波形的情况,提出基于现场可编程门阵列（FPGA）和数字信号处理器（DSP）控制DDS来实现高速稳定雷达发射机的设计方案。首先,介绍了直接数字式频率合成的结构和原理。其次,设计了雷达发射机的硬件电路和软件编程,其中为提高雷达系统工作稳定性,保证DSP控制DDS产生稳定的波形信号,特别加入了对DSP工作状态进行监测和控制的模块电路。测试结果表明,设计的雷达发射机能够通过示波器输出稳定、实时的普通连续波、FSK信号、单频脉冲信号等多种波形,信号频率的范围在0~100 MHz,频率稳定度达到1%。For using a direct digital frequency synthesis（ DDS） chip can not directly produce a variety of signal waveforms,this paper proposes a radar transmitter with high-speed stability,which controls DDS based on field programmable gate array（ FPGA） and digital signal processor（ DSP）. Firstly the paper presents the structure and principle of the direct digital frequency synthesis. Then the hardware circuit and the software programming are designed,in which a monitoring module is specially added to monitor and control the DSP working state,so as to ensure that DSP may control DDS to produce stable waveform signals. Finally,the test result shows that the radar transmitter may output stable,real-time continuous ordinary waves through oscilloscope,FSK signal,single-frequency pulse signal and other waveforms. The frequency of the signal is within the range of 0 ~ 100 MHz,and the frequency stability reaches 1%.

关 键 词：直接数字式频率合成 数字信号处理器 可编程门阵列 高速稳定性 雷达发射机 

分 类 号：TN914.2[电子电信—通信与信息系统]