一种全差分增益增强型运算放大器的设计  

A Design of Fully Differential Gain-Boosted Operational Amplifier

作　　者：史志峰[1] 王卫东[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《电子器件》2015年第1期78-82,共5页Chinese Journal of Electron Devices

摘　　要：设计了一种用于高速ADC中的全差分运算放大器。该运算放大器由主运放、4个辅助运放和一种改进型开关电容共模反馈电路组成,主运放采用折叠式共源共栅结构,并引入增益增强技术提高增益。采用SMIC 0.18μm,1.8 V工艺,在Cadence电路设计平台中利用Spectre仿真,结果表明:运放增益达到115 d B,单位增益带宽805 MHz,而功耗仅为10.5 m W,运放在8 ns的时间内可以达到0.01%的建立精度,可用于高速高精度流水线(Pipelined)ADC中。A fully differential op-amp used in a high speed ADC is designed. This operational amplifier is consisted of a main OTA in folded cascade,four single-ended auxiliary OTA and a modified switched capacitor common mode feedback circuit. Gain-boosted technique has been introduced. Based on SMIC 0. 18 μm,1. 8 V process,Simulation has been run in Spectre under Cadence platform. The result shows that DC-gain of the amplifier is as high as 115 d B,unity-gain bandwidth is 805 MHz and the power consumption is 10. 5 m W. And it can reach an accuracy of 0. 01% within 8 ns. This amplifier is specially used in a high speed pipelined ADC.

关 键 词：流水线ADC 高增益高速运算放大器 增益增强技术 

分 类 号：TN342[电子电信—物理电子学]