组合逻辑实验电路设计方法研究  

Study on Designing Methods of the Combinational Logic Experimental Circuit

作　　者：阎群[1,2] 韩守梅[1] 木春梅[1] 李擎[1] 

机构地区：[1]北京科技大学自动化学院,北京100083 [2]北京科技大学钢铁流程先进控制教育部重点实验室,北京100083

出　　处：《实验科学与技术》2015年第1期17-20,共4页Experiment Science and Technology

摘　　要：讨论了三人表决逻辑电路,分别采用小规模集成门电路、中规模集成电路、只读存储器和可编程逻辑阵列实现了六种三人表决逻辑实验电路,总结了设计组合逻辑电路的步骤和方法。该方法对其他数字逻辑电路的设计具有一定的指导作用。The details of three people voting circuit are discussed. Six different experiment circuits for three people voting experimental circuit are designed,based on small scale integrated gate circuit,middle scale integrated gate circuit and read- only memory,programmable logic array,respectively. Steps and methods of designing combinational logic circuit are summarized,which can be used for reference when design other digital logic circuit.

关 键 词：组合逻辑 逻辑表达式 逻辑电路 三人表决电路 

分 类 号：TN710.5[电子电信—电路与系统]