A novel high figure-of-merit SOI SJ LDMOS with ultra-strong charge accumulation effect  

作　　者：田瑞超 罗小蓉 周坤 徐青 魏杰 张波 李肇基 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

出　　处：《Journal of Semiconductors》2015年第3期79-84,共6页半导体学报（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(Nos.61176069,61376079);the Program for New Century Excellent Talents in University of Ministry of Education of China(No.NCET-11-0062)

摘　　要：A novel silicon-on-insulator（SOI） super-junction（SJ） LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features： an assisted-accumulation trench-type extending gate（TEG） with a high-k（HK） dielectric and a step-dopedN pillar（TEG-SD SJ LDMOS）. In the on-state, electrons accumulate at the sidewall of the HK dielectric from the source to the drain by the TEG. Furthermore, the high permittivity of the HK dielectric leads to an ultra-strong charge accumulation effect. As a result, an ultra-low resistance current path is formed. The specific on-resistance（Ron;sp/ is thus greatly reduced and is independent of the drift doping concentration. In the off-state, the step-dopedN pillar effectively suppresses the substrate-assisted depletion effect by charge compensation. Moreover, the reshape effect of the HK dielectric and the new electric field（E-field） peak introduced by the step-dopedN pillar enhance the drift region E-field. Hence, the BV is improved. Simulation indicates that the TEG-SD SJ LDMOS achieves an extremely low Ron;sp of 1.06 m cm^2 and a BV of 217 V. Compared with the conventional SJ LDMOS, the TEG-SD SJ LDMOS decreases the Ron;sp by 77.5% and increases the BV by 33%,exhibiting a high figure of merits（FOM=BV^2/Ron;sp/ of 44 MW/cm^2.A novel silicon-on-insulator（SOI） super-junction（SJ） LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features： an assisted-accumulation trench-type extending gate（TEG） with a high-k（HK） dielectric and a step-dopedN pillar（TEG-SD SJ LDMOS）. In the on-state, electrons accumulate at the sidewall of the HK dielectric from the source to the drain by the TEG. Furthermore, the high permittivity of the HK dielectric leads to an ultra-strong charge accumulation effect. As a result, an ultra-low resistance current path is formed. The specific on-resistance（Ron;sp/ is thus greatly reduced and is independent of the drift doping concentration. In the off-state, the step-dopedN pillar effectively suppresses the substrate-assisted depletion effect by charge compensation. Moreover, the reshape effect of the HK dielectric and the new electric field（E-field） peak introduced by the step-dopedN pillar enhance the drift region E-field. Hence, the BV is improved. Simulation indicates that the TEG-SD SJ LDMOS achieves an extremely low Ron;sp of 1.06 m cm^2 and a BV of 217 V. Compared with the conventional SJ LDMOS, the TEG-SD SJ LDMOS decreases the Ron;sp by 77.5% and increases the BV by 33%,exhibiting a high figure of merits（FOM=BV^2/Ron;sp/ of 44 MW/cm^2.

关 键 词：charge accumulation effect super junction breakdown voltage specific on-resistance 

分 类 号：TN386[电子电信—物理电子学]