Ultralow specific on-resistance high voltage trench SOI LDMOS with enhanced RESURF effect  

作　　者：徐青 罗小蓉 周坤 田瑞超 魏杰 范远航 张波 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

出　　处：《Journal of Semiconductors》2015年第2期99-105,共7页半导体学报（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(Nos.61176069,61376079)

摘　　要：A RESURF-enhanced high voltage SOl LDMOS （ER-LDMOS） with an ultralow specific on-resistance （Ron, sp） is proposed. The device features an oxide trench in the drift region, a P-pillar at the sidewall of the trench, and a buried P-layer （BPL） under the trench. First, the P-pillar adjacent to the P-body not only acts as a vertical junction termination extension （JTE）, but also forms a vertical reduced surface field （RESURF） structure with the N- drift region. Both of them optimize the bulk electric field distributions and increase the doping concentration of the drift region. Second, the BPL together with the N-drift region and the buried oxide layer （BOX） exhibits a triple- RESURF effect, which further improves the bulk field distributions and the doping concentration. Additionally, multiple-directional depletion is induced owing to the P-pillar, the BPL, and two MIS-like structures consisting of the N-drift region combined with the oxide trench and the BOX. As a result, a significantly enhanced-RESURF effect is achieved, leading to a high breakdown voltage （BV） and a low Ron, sp. Moreover, the oxide trench folds the drift region in the vertical direction, resulting in a reduced cell pitch and thus Ron, sp. Simulated results show that the ER-LDMOS improves BV by 67% and reduces Ron, sp by 91% compared with the conventional trench LDMOS at the same cell pitch.A RESURF-enhanced high voltage SOl LDMOS （ER-LDMOS） with an ultralow specific on-resistance （Ron, sp） is proposed. The device features an oxide trench in the drift region, a P-pillar at the sidewall of the trench, and a buried P-layer （BPL） under the trench. First, the P-pillar adjacent to the P-body not only acts as a vertical junction termination extension （JTE）, but also forms a vertical reduced surface field （RESURF） structure with the N- drift region. Both of them optimize the bulk electric field distributions and increase the doping concentration of the drift region. Second, the BPL together with the N-drift region and the buried oxide layer （BOX） exhibits a triple- RESURF effect, which further improves the bulk field distributions and the doping concentration. Additionally, multiple-directional depletion is induced owing to the P-pillar, the BPL, and two MIS-like structures consisting of the N-drift region combined with the oxide trench and the BOX. As a result, a significantly enhanced-RESURF effect is achieved, leading to a high breakdown voltage （BV） and a low Ron, sp. Moreover, the oxide trench folds the drift region in the vertical direction, resulting in a reduced cell pitch and thus Ron, sp. Simulated results show that the ER-LDMOS improves BV by 67% and reduces Ron, sp by 91% compared with the conventional trench LDMOS at the same cell pitch.

关 键 词：RESURF-enhanced multiple-directional depletion effect silicon-on-insulator breakdown voltage specific on-resistance 

分 类 号：TN386[电子电信—物理电子学]