USB3.0接口在数据存储系统中的应用  

High-speed Data Transfer Circuit Design and Implementation Based on USB3.0

作　　者：张会新[1] 石永亮[1] 秦丽[1] 崔建利[1] 

机构地区：[1]中北大学电子测试技术国家重点实验室仪器科学与动态测试教育部重点实验室,太原030051

出　　处：《计算机测量与控制》2015年第3期1017-1019,1025,共4页Computer Measurement &Control

基　　金：国家高技术研究发展计划(863计划)(2011AA040404)

摘　　要：目前存储器需存储的数据量越来越大,高速数据传输系统的需求变得极为迫切;为实现海量数据的高速稳定传输,并同时具有便携性及兼容性等特征,介绍了一种以FPGA为控制核心,DDR2SDRAM为高速大容量缓存,USB3.0接口作为记录器与计算机进行数据通信接口的高速数据传输系统,通过模块硬件电路及软件协议实现了数据的高可靠性稳定传输,解决了大容量存储器和计算机之间的数据传输速度瓶颈;经长期试验证明:该接口传输速度可稳定达到150 M/s,且数据可靠无误,满足任务设计要求。At present, the amount of data to be stored in the memory is increasing, the need of high-speed data transmission system becomes extremely urgent. To achieve highly stable transmission of large quantities of data, and also has features such as portability and compatibility, a high--speed data transmission system was introduced, which regards FPGA as a control core, DDR2 SDRAM for high-speed large-capacity cache, USB3. 0 for data communication interface between recorder and computer. By module hardware circuitry and software protocols, it has achieved highly reliable and stable transmission of data, and solved large--capacity data transfer speed bottleneck. The long--term test proved： the interface transfer rate may stably reach to 150 M/s, and the data is accurate and reliable, designed to meet the mission requirements.

关 键 词：USB3.0 DDR2 FPGA 高速数据传输 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]