高密度存储服务器高速链路设计与仿真  

High-speed channel design and simulation of high density storage server

作　　者：沙超群[1] 任雪玉 胡长军[1] 聂华[1] 陈进 

机构地区：[1]北京科技大学计算机与通信工程学院,北京100083 [2]曙光信息产业有限公司,北京100193 [3]哈尔滨工程大学水声工程学院,黑龙江哈尔滨150001 [4]中国科学院微电子研究所,北京100029

出　　处：《国防科技大学学报》2015年第1期39-46,共8页Journal of National University of Defense Technology

基　　金：国家"863"高技术研究发展计划基金资助项目(2013AA01A209);北京市科委计划项目(D141100003414002)

摘　　要：针对高密度存储服务器中高速链路结构复杂、信号速率高、链路长度长等特点,在高速链路PCIE3.0和SAS3.0设计过程中引入全面的信号完整性仿真。通过对高速印刷电路板设计中拓扑结构、材料类型、印刷电路板结构等关键项目进行仿真设计,获得成本最低、性能达标的最优方案;通过全链路有源仿真,预估系统性能,降低系统投产风险;通过系统实际信号测试,验证系统性能完全满足相应规范要求,仿真结果有效可靠。Comprehensive signal integrity simulation was introduced in the design of PCI-E3. 0 and SAS3. 0 channels of high density storage server,which are characterized by complicated structures,high signal speed and long and dense traces. The optimized cost-effective design was obtained by simulating the key items of high-speed PCB design such as topology,material and high-speed via structure. The system performances were then evaluated by full channel active simulation to ensure the stability of the system and reduce the manufacture risks. The signal quality of storage server system totally meets the requirement of PCI-E3. 0 and SAS3. 0 specifications,verifying the effectiveness and reliability of signal integrity simulation.

关 键 词：高速印刷电路板设计 信号完整性仿真 信号测试 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]