一种可重构算子阵列结构的功耗评估方法  

A Power Evaluation Methodology for Reconfigurable Operator Array

作　　者：雍珊珊[1] 王新安[1] 谢峥[1] 曹颖[1] 

机构地区：[1]北京大学深圳研究生院集成微系统科学工程与应用重点实验室,深圳518055

出　　处：《微电子学》2015年第2期153-156,163,共5页Microelectronics

基　　金：深圳科技提升计划基础研究重点项目(JCYJ20120614150120560)

摘　　要：介绍了一种面向新型FPGA结构—可重构算子阵列的功耗评估方法。分析了可重构算子阵列结构的功耗构成,同现有的功耗评估方法进行对比,提出基于最大功耗的评估策略。可重构算子和互连单元采用自动测试矢量生成(ATPG)方法计算最大功耗,互连线段的功耗则通过RC等效模型得到。将所有被使用的资源功耗相加,得到该设计所对应的最大功耗值,作为结构探索和在实际应用中阵列规模选取、布局布线优化的指导。A power evaluation methodology for novel FPGA,reconfigurable operator array,was presented.The sources of power for reconfigurable operator array were analyzed,and a review of methods for power evaluation was also discussed.Then a method based on maximum power was proposed.The maximum power of reconfigurable operators and interconnection units was computed through the method of automatic test pattern generation（ATPG）.For the segment of interconnection,the power was computed based on RC model.The summary of all used resources＇maximum power was the final maximum power for a specific application.The result of power evaluation could be an guidance for architecture exploration and array size selection,placement and route optimization.

关 键 词：功耗评估 可重构算子阵列 自动测试矢量生成 FPGA 

分 类 号：TN492[电子电信—微电子学与固体电子学]