带有阻抗衰减缓冲的高性能LDO的设计  

Design of High-Performance LDO with Buffer Impedance Attenuation

作　　者：任志德[1] 郭春生[1] 林平分[1] 

机构地区：[1]北京工业大学电子信息与控制工程学院,北京100124

出　　处：《微电子学》2015年第2期225-227,232,共4页Microelectronics

摘　　要：提出了一种带有阻抗衰减缓冲形式的LDO。在缓冲器的设计中,采用动态偏置并联反馈的结构来降低其输出阻抗,进而降低静态电流,提高系统的瞬态响应。通过电流缓冲补偿结构,在环路单位增益带宽内实现了单极点,达到64°的相位裕度。在csmc 0.35μm工艺下进行流片,结果表明,在无负载条件下,LDO具有18μA的静态电流,并能提供200mA的负载电流,在全负载条件下电流转换效率为99.8%,能应用于多种带有锂离子电池的便携式器件中。A LDO with an impedance-attenuated buffer was proposed.A shunt feedback was used in the buffer to lower its output resistance and improve both load transient response and stability during the design of the buffer.A single pole within the unity-gain bandwidth and a phase margin of 64 degree were achieved through the current buffering complementary structure.It had been implemented in csmc 0.35μm process.The results showed that the circuit consumed very small quiescent current of about 18μA,and it could provide a load current of 200 mA.It had a very high current efficiency about 99.8% at full load.It could be applied to a variety of portable devices with lithium-ion batteries.

关 键 词：稳压器 并联反馈 静态电流 缓冲器 

分 类 号：TN402[电子电信—微电子学与固体电子学]