一种数字陀螺中Σ-ΔDAC的数字调制器设计和验证  被引量:2

Design and verification of a digital modulator of a sigma-delta DAC for digital gyroscope

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作  者:郭红转[1] 

机构地区:[1]南阳理工学院计算机与信息工程学院,河南南阳473004

出  处:《电子技术应用》2015年第4期53-55,59,共4页Application of Electronic Technique

摘  要:采用单环级联分布式前馈结构(CIFF)设计并实现了一款三阶四比特量化的Σ-Δ数字调制器。噪声传递函数通过局部反馈技术进行了零点优化,并且对各系数进行CSD(Canonical Signed Digit)编码优化。系统建模仿真结果得到SNDR为120.3 d B,有效位数(ENOB)为19.7位。针对多位量化适配问题,采用数据加权平均(DWA)算法对误差进行噪声整形,以减小失配引起的非线性误差。利用增加单元DAC的方法,对DWA算法进行改进,解决了其在直流或低频周期信号下会产生杂波的问题,并对其进行系统建模与仿真。最后利用FPGA验证了IDWA-DAC系统模型的正确性,这种结构能够有效提高动态范围,满足设计要求。A sigma-delta digital modulator using a single-loop cascaded and distributed feed-forward structure is designed in this paper with third-order 4-bit quantization. Local feedback technology is applied to optimize the zero of noise transfer function, and the coefficients are also optimized based on the CSD code. Simulation results show that the SNDR can reach 120.3 dB, and ENOB is 19.7. This paper uses a data-weighted-average (DWA) algorithm for noise shaping of the multi-bit quantization to reduce the nonlinearity error caused by the mismatch. By increasing the number of the DAC unit to improve the DWA algorithm, the problem of tones introduced by the DC or low frequency periodic signals is solved, and its system model and simulation are accomplished. Finally, the system model of IDWA-DAC is proved to be valid by the FPGA verification, and it effectively improves the dynamic range and meets the design requirements.

关 键 词:∑-△调制器 数字调制器 多位量化 

分 类 号:TN79[电子电信—电路与系统]

 

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