一款低功耗的高速CMOS LVDS信号接收器  

Design of a low-power high-speed CMOS LVDS receiver

作　　者：丁艳玲 

机构地区：[1]南京机电职业技术学院自动化工程系,江苏南京211135

出　　处：《电子技术应用》2015年第3期55-57,共3页Application of Electronic Technique

摘　　要：针对高速数据传输的需要,设计一款低功耗的高速C MOS LVDS(低电压差分信号)接收器。接收器采用S MIC 0.13μm CMOS工艺,应用工艺中提供的厚栅氧化器件(3.3 V器件)和薄栅氧化器件(1.2 V器件)两种器件,使其满足输入L VDS信号的共模电压范围为0.05 V^2.4 V、差模电压范围为100 m V^400 m V的情况下工作,完全符合L VDS接口标准的要求。所设计芯片具有功耗低、传输速度快、成本低等优点。Aiming at the need of high speed data transmission, a low-power high-speed CMOS LVDS（Low Voltage Differential Signaling） receiver is designed. The circuits are implemented in SMIC 0.13 μm CMOS technology using thick （3.3 V） and thin （1.2 V） gate oxide devices, and support the input common mode voltage range of 0.05 V to 2.4 V and the input differential voltage range of 100 mV to 400 mV as specified by LVDS I/O standard. The chip has the advantages of low power consumption, fast transmis- sional speed and low cost.

关 键 词：低电压差分信号 LVDS I/O 低功率芯片 高速集成电路 

分 类 号：TN710-34[电子电信—电路与系统]