An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer  

An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer

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作  者:李鹏程 罗小蓉 罗尹春 周坤 石先龙 张彦辉 吕孟山 

机构地区:[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

出  处:《Chinese Physics B》2015年第4期399-404,共6页中国物理B(英文版)

基  金:Project supported by the National Natural Science Foundation of China(Grant Nos.61176069 and 61376079);the Program for New Century Excellent Talents at the University of Ministry of Education of China(Grant No.NCET-11-0062)

摘  要:An ultra-low specific on-resistance (Ron,sp) oxide trench-type silicon-on-insulator (SOI) lateral double-diffusion metal-oxide semiconductor (LDMOS) with an enhanced breakdown voltage (BV) is proposed and investigated by simulation. There are two key features in the proposed device: one is a U-shaped gate around the oxide trench, which extends from source to drain (UG LDMOS); the other is an N pillar and P pillar located in the trench sidewall. In the on-state, electrons accumulate along the U-shaped gate, providing a continuous low resistance current path from source to drain. The Ron,sp is thus greatly reduced and almost independent of the drift region doping concentration. In the off-state, the N and P pillars not only enhance the electric field (E-field) strength of the trench oxide, but also improve the E-field distribution in the drift region, leading to a significant improvement in the BV. The BV of 662 V and Ron,sp of 12.4 mΩ.cm2 are achieved for the proposed UG LDMOS. The BV is increased by 88.6% and the Ron,sp is reduced by 96.4%, compared with those of the conventional trench LDMOS (CT LDMOS), realizing the state-of-the-art trade-off between BV and Ron,sp.An ultra-low specific on-resistance (Ron,sp) oxide trench-type silicon-on-insulator (SOI) lateral double-diffusion metal-oxide semiconductor (LDMOS) with an enhanced breakdown voltage (BV) is proposed and investigated by simulation. There are two key features in the proposed device: one is a U-shaped gate around the oxide trench, which extends from source to drain (UG LDMOS); the other is an N pillar and P pillar located in the trench sidewall. In the on-state, electrons accumulate along the U-shaped gate, providing a continuous low resistance current path from source to drain. The Ron,sp is thus greatly reduced and almost independent of the drift region doping concentration. In the off-state, the N and P pillars not only enhance the electric field (E-field) strength of the trench oxide, but also improve the E-field distribution in the drift region, leading to a significant improvement in the BV. The BV of 662 V and Ron,sp of 12.4 mΩ.cm2 are achieved for the proposed UG LDMOS. The BV is increased by 88.6% and the Ron,sp is reduced by 96.4%, compared with those of the conventional trench LDMOS (CT LDMOS), realizing the state-of-the-art trade-off between BV and Ron,sp.

关 键 词:TRENCH U-shaped gate specific on-resistance breakdown voltage 

分 类 号:TN386[电子电信—物理电子学]

 

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