印刷体数字识别系统的FPGA实现  

Printed digit recognition system based on field programmable gate array

作　　者：高振斌[1] 赵盼[1] 王霞[1] 陈洪波[1] 

机构地区：[1]河北工业大学信息工程学院,天津300401

出　　处：《重庆邮电大学学报（自然科学版）》2015年第2期213-218,共6页Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)

基　　金：河北省高等学校科学技术研究重点项目(ZD20131043)~~

摘　　要：为提高处理速度,构建了一种基于现场可编程门阵列(field programmable gate array,FPGA)的印刷体数字识别系统。该系统采用基于投影特征的字符分割和基于统计特征的字符识别原理,在Nexys-3硬件平台上完成了OV7670摄像头数据采集、图像预处理、字符分割与识别和结果显示的功能。在设计中,采取仅存储二值化图像的方法来降低系统对存储资源的需求,并使用乒乓操作进行存储从而达到实时处理的目的。为更合理地使用FPGA器件的内部资源,调用了片内数字时钟管理单元(digital clock manager,DCM)、乘法器、双端口RAM以及先入先出队列(first input first output,FIFO)等IP核(intellectual property core)。最后在Modelsim中进行时序仿真,验证各个子模块的功能,并将各模块集成在开发板上进行硬件实现。通过对实验结果分析可知,该系统使用了较少的逻辑资源,在摄像头的帧速率为30 f/s的情况下,可以成功实时识别印刷体数字并将识别结果输出。A printed digit recognition system based on FPGA is proposed to increase the processing rate. It uses the principle of character segmentation based on the projection feature and character recognition based on statistical feature. This system gets the image frame from the OV7670 camera. After pre-processing,the image is segmented and each digital character is recognized and displayed. In the design,only the binary images are stored to reduce demand of the memories. Additionally,ping-pong operation is used in data storing for real-time feasibility. The IP cores,such as internal DCM,Multiplier,Dual-port RAM and FIFO,are applied for making better use of the FPGA resources. At last,each submodule is validated through timing stimulation by Modelsim,and then the integrated system is implemented on the Digilent Nexys-3 hardware platform. The experiment shows that this system succeeds in identifying the printed digits and outputs of the results realtimely using very limited logic resources. And the frame rate of the camera is 30 fps.

关 键 词：数字识别 现场可编程门阵列(FPGA) 投影特征 统计特征 资源 

分 类 号：TN79[电子电信—电路与系统] TP391.4[自动化与计算机技术—计算机应用技术]