低延迟路由器中高效开关分配机制的实现与评测  

Design and Implementation of Efficient Switching in Low-latency Router

作　　者：李存禄 董德尊[1] 吴际[1] 雷斐[1] 王克非[1] 廖湘科[1] 

机构地区：[1]国防科技大学并行与分布处理重点实验室,湖南长沙410073

出　　处：《湖南大学学报（自然科学版）》2015年第4期78-84,共7页Journal of Hunan University:Natural Sciences

基　　金：国家自然科学基金资助项目(61272482);全国优秀博士学位论文作者专项资金资助项目(201450)~~

摘　　要：开关分配位于片上网络路由器流水线的关键路径上,对路由器以至整个片上网络的性能都会产生很大影响.已有的开关分配方法主要针对标准流水线路由器进行分析改进,缺乏对低延迟路由器中基于时间序列的开关分配方法的研究.本文首次在低延迟路由器上实现了基于时间序列的开关分配机制,并针对分配过程中优先矩阵的构造特点进行了优化改进.仿真实验结果表明在低延迟路由器中采用基于时间序列的开关分配策略可以使片上网络的性能得到很大提升.Switch allocation is a critical stage of router pipelines for On-Chip Networks, whose per- formance influences the overall performance of a router and even the whole NoC greatly. However, the ex- isting time-series based switch allocation mainly is considered in canonical five-pipeline router architecture, and the researching in low-latency router is absent. So this paper made the first attempt to implement the time-series based switch allocation in low-latency router, and made improvement based on the construction features of priority matrixes in switch allocating. Simulation experiments results show that the combining time-series switch with low-latency router can greatly improve the performance of state-of-the-art NoCs.

关 键 词：片上网络 开关分配 时间序列 低延迟路由器 短报文 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]