基于状态机的图像信息提取的FPGA设计及仿真分析  

FPGA design of image information extraction based on FSM

作　　者：钱鹏[1,2] 苏海冰[1] 

机构地区：[1]中国科学院光电技术研究所,四川成都610209 [2]中国科学院大学,北京100190

出　　处：《微型机与应用》2015年第8期44-46,49,共4页Microcomputer & Its Applications

摘　　要：现场可编程逻辑门阵列(FPGA)应用于图像处理时,需要对数据中的图像信息进行准确的提取。设计中,FPGA中解压缩功能需要对压缩数据中的图像信息进行提取。根据压缩格式,设计了一种基于状态机的图像信息提取模块,并且在XST(Xilinx官方综合工具)以及Synplify pro两个综合环境下进行了仿真验证。通过对比仿真结果的差异,尝试分析设计的寄存器传输级视图(RTL视图),并找出了影响状态机工作的关键要素。强调了代码风格对FPGA设计的重要性。When FPGA is applied in the field of image processing, it is important to extract the information of the image accurately form the data. In this paper, a module was designed based on finite state machine to extract the information of the image form the packed data, and the module was used in the function of unpack in FPGA. The module was implemented and simulated in ISE using XST and Synplify pro for synthesis. By the difference comparison of two simulations, we tried to analyze the RTI, schematic of the design and find out the factors which play important parts in the FPGA design. In the final, we emphasized the importance of VHDL code style.

关 键 词：现场可编程逻辑门阵列 状态机 XST SYNPLIFY PRO 代码风格 

分 类 号：TN911.73[电子电信—通信与信息系统]