可配置片上数据存储的统一存取  

Unified Access of Configurable On-chip Data Storage

作　　者：刘博[1] 杜文亮[1] 

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710068

出　　处：《航空计算技术》2015年第2期113-117,共5页Aeronautical Computing Technique

基　　金：国家"核高基"重大专项基金资助项目(2009ZX01034-001-002-003)

摘　　要：针对DSP应用领域高实时性和大容量存储的需求,提出了一种基于MCU-DSP融合架构处理器的可配置片上数据存储统一存取设计方法。介绍了片上数据存储的总体结构与其内部数据存储的组织结构,采用非连续字节编址模式和特殊的访存地址分割与组合,结合类零级Cache的数据行缓存,实现了片上数据存储Cache和SPRAM(Scratch-pad RAM)的可配置与高速统一存取。A design of unified access of configurable on-chip data storage based on MCU-DSP hybrid architecture processor was proposed to meet the requirements of the high real- time and high- capacity storage in DSP system application field. The overall structure of the on- chip data storage and the organizational structure of the internal data storage was described firstly in this paper. The design method proposed in this paper used both the non-continuous byte addressing mode and the segmentation and？ combination of the special access address. We made use of the data line buffer which was similar to the zero- level Cache. The method was able to configure and rapidly unified access the Cache and SPRAM of on- chip data storage by using the data line buffer.

关 键 词：DSP 片上数据存储 统一存取 非连续字节编址 SPRAM 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]