一种基于FPGA的改进型数字Costas环的设计  

An Improved Costas Loop Design Based on FPGA

作　　者：张鹏 周旭广 路正高[2] 杨志强[2] 

机构地区：[1]93808部队 [2]93897部队

出　　处：《价值工程》2015年第15期211-213,共3页Value Engineering

摘　　要：针对通信等领域中的接收端载波恢复问题,通过对数字Costas环原理的分析和仿真,在阐述FFT频率估计的基础上,提出了在Costas环中加入FFT模块进行辅助捕获载频的方法,从而加大了环路的捕获带宽。同时,利用MATLAB软件进行了仿真,进一步在Xilinx ISE13.3环境中,用Verilog语言对改进型环路进行了FPGA软件设计,给出了改进环路和FFT模块的RTL原理图,并对关键设计进行了说明,可知该环路将具有较好的实用性。Aimed at the recovery problems of receiving end in communications and other fields, through the analysis and simulation of the principle of digital Costas loop, the method of adding FFT model to Costas loop to capture carrier frequency is proposed based on expounding the estimation of FFT frequency. It can increase the capture bandwidth of loop. Meanwhile, MATLAB is used to simulate the research to improve loop software of FPGA in Xilinx ISE13.3 environment with Verilog language. The improved loop and FFT module RTL schematic are put forward, the key design is elaborated. It shows that the loop has better practicality.

关 键 词：COSTAS环 FFT FPGA 

分 类 号：TN911.8[电子电信—通信与信息系统]