指令集仿真器的关键技术  

Key techniques for fast instruction set simulator

作　　者：付琳[1] 胡锦[1] 梁利平[2] 

机构地区：[1]湖南大学物理与微电子科学学院,长沙410082 [2]中国科学院微电子研究所,北京100029

出　　处：《计算机应用》2015年第5期1421-1425,共5页journal of Computer Applications

基　　金：湖南省科技计划项目(2014GK3002;2014GK3148)

摘　　要：为适应嵌入式系统开发中对指令集仿真器仿真速度的要求,提出一种改进的指令集仿真技术。该技术在现有的静态多核仿真器基础上引入指令预处理、动态译码缓存、多线程C函数生成和动态调度运行等技术,以实现对仿真器性能的优化。该技术已成功应用于中国科学院微电子所自主研发的IME-Diamond DSP处理器的多核指令集仿真器OPT-ISS中。实际应用程序测试结果表明,该技术在仿真速度提升方面有明显效果。In order to adapt to the the requirement of the Instruction Set Simulator（ ISS） simulation speed in embedded system development, an improved ISS technology was put forward. The technology introduced instruction preprocessing,dynamic decode cache structure, multi-thread C function generation and dynamic scheduling technique based on the existing static multi-core simulator to achieve the optimization of the simulator performance. This technique has been applied successfully in forming OPT-ISS, which is based on IME-Diamond multi-core DSP processor. The experimental results show that this technique improves the simulation speed indeed.

关 键 词：多核 指令集仿真器 多线程 译码缓存 C函数生成 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]