A capacitive DAC with custom 3-D 1-fF MOM unit capacitors optimized for fastsettling routing in high speed SAR ADCs  

作　　者：陈迟晓 向济璇 陈华斌 许俊 叶凡 李宁 任俊彦 

机构地区：[1]State Key Laboratory of ASIC and System,Fudan University

出　　处：《Journal of Semiconductors》2015年第5期158-162,共5页半导体学报（英文版）

摘　　要：Asynchronous successive approximation register （SAR） analog-to-digital converters （ADC） feature high energy efficiency but medium performance. From the point of view of speed, the key bottleneck is the unit ca- pacitor size. In this paper, a small size three-dimensional （3-D） metal-oxide-metal （MOM） capacitor is proposed. The unit capacitor has a capacitance of 1-fF. It shapes as an umbrella, which is designed for fast settling consideration. A comparison among the proposed capacitor with other 3-D MOM capacitors is also given in the paper. To demonstrate the effectiveness of the MOM capacitor, a 6-b capacitive DAC is implemented in TSMC 1P9M 65 nm LP CMOS technology. The DAC consumes a power dissipation of 0.16 mW at the rate of 100 MS/s, excluding a source-follower based output buffer. Static measurement result shows that 1NL is less than -4-1 LSB and DNL is less than ＋0.5 LSB. In addition, a 100 MS/s 9-bit SAR ADC with the proposed 3-D capacitor is simulated.Asynchronous successive approximation register （SAR） analog-to-digital converters （ADC） feature high energy efficiency but medium performance. From the point of view of speed, the key bottleneck is the unit ca- pacitor size. In this paper, a small size three-dimensional （3-D） metal-oxide-metal （MOM） capacitor is proposed. The unit capacitor has a capacitance of 1-fF. It shapes as an umbrella, which is designed for fast settling consideration. A comparison among the proposed capacitor with other 3-D MOM capacitors is also given in the paper. To demonstrate the effectiveness of the MOM capacitor, a 6-b capacitive DAC is implemented in TSMC 1P9M 65 nm LP CMOS technology. The DAC consumes a power dissipation of 0.16 mW at the rate of 100 MS/s, excluding a source-follower based output buffer. Static measurement result shows that 1NL is less than -4-1 LSB and DNL is less than ＋0.5 LSB. In addition, a 100 MS/s 9-bit SAR ADC with the proposed 3-D capacitor is simulated.

关 键 词：metal-oxide-metal capacitor SAR analog-to-digital convertors digital-to-analog convertors 

分 类 号：TN792[电子电信—电路与系统] TP212[自动化与计算机技术—检测技术与自动化装置]