基于CPLD和单片机的等精度数字频率计设计  

Design of equal precision digital cymometer based on CPLD and SCM

作　　者：李莉 熊晶[2] 

机构地区：[1]山西工程技术学院信息工程与自动化系,山西阳泉045000 [2]武警湖北总队医院,湖北武汉430000

出　　处：《现代电子技术》2015年第10期118-120,123,共4页Modern Electronics Technique

摘　　要：根据相位重合点理论对等精度数字频率计进行改进,采用该理论可使对标准频率信号和待测频率的计数同时开始,消除了对标准频率信号计数时±1个周期的误差。系统设计主要包括三部分:待测频率的整形放大部分;计数部分,采用CPLD,相位重合点的检测也在CPLD中完成;频率的计算和显示部分由单片机AT89C51完成。CPLD部分的仿真使用Max+PlusⅡ,单片机部分的仿真使用Protues软件。测试结果表明,待测频率在1 Hz^10 MHz范围内,频率计测量精度高,稳定性好。According to the phase coincidence theory,the equal precision digital cymometer was improved. The standard frequency signal and the frequency under test are counted in the same time by means of the phase coincidence theory,and then ＆#177;1 periodic error is eliminated when standard frequency signal is counted. This system is composed of three parts：amplification and rectification,counting with CPLD（detection of the phase coincidence point is completed in it）,and frequency calculation and display （which is completed with single chip AT89C51）. The simulation software Max＋Plus Ⅱ is used for simulation of CPLD,and the software Protues is used for simulation of single chip microcontroller（SCM）. The experiment results show that the cymometer has the advantages of high measuring precision and good operation stability,when the frequency under test is in the range of 1 Hz^10 MHz.

关 键 词：相位重合点理论 CPLD 等精度数字频率计 Max+Plus Ⅱ 

分 类 号：TN710-34[电子电信—电路与系统] TM935.13[电气工程—电力电子与电力传动]