取样锁相频率源的设计  

Design on Sampling Phase-locked Frequency Synthesizer

作　　者：李春利[1] 

机构地区：[1]南京电子技术研究所,南京210039

出　　处：《现代雷达》2015年第5期71-73,78,共4页Modern Radar

摘　　要：从实际产品出发,针对应用中对噪声的需求,研究了取样锁相频率源,分析了取样锁相的原理、技术特点以及应用前景,设计了一种环路滤波器和扩捕电路,并用波特图对环路稳定性进行了分析,给出了一种取样锁相频率源的研制结果及其相位噪声等关键指标的实测结果。该取样锁相频率源具有体积小、相噪优、调试简单等特点,可广泛应用于雷达接收机系统。In terms of the noise demand for the actual product, this paper described a sampling phase-locked synthesizer. The prin- ciple, technical features and application prospect of the sampling phase-lock were analyzed in the paper. A loop filter and a captu- ring circuit were designed. Through the evaluation of the stability in the loop by Bode diagram, a research report for the sampling phase-locked synthesizer was achieved. Then some significant measuring parameters of the sampling phase-locked synthesizer were showed, such as phase noise. The sampling phase-locked synthesizer has the trait of mini-volume, fine-phase noise and simple-de- bugging. It can be widely used in radar receiver system.

关 键 词：取样锁相 环路滤波器 扩捕电路 

分 类 号：TN911.8[电子电信—通信与信息系统]