基于改进DDS算法的任意信号发生器设计  

Design of arbitrary signal generator based on improved DDS algorithm

作　　者：卫恒[1] 王德功[1] 刘扬[1] 朱敏[1] 

机构地区：[1]空军航空大学信息对抗系,吉林长春130022

出　　处：《电子技术应用》2015年第6期38-41,共4页Application of Electronic Technique

摘　　要：针对传统直接数字频率合成(DDS)算法存在的幅度量化误差、相位截断误差问题,提出了一种混合利用信号对称性+Sunderland构造对数据ROM进行压缩的方法 ,用来增大数据ROM的存储量,同时采用改进型相位抖动注入法抑制相位截断误差。硬件电路部分设计了幅频校正电路,对信号进行校正,保证了信号幅度的稳定输出。测试结果表明,信号发生器可以输出高速、稳定、低衰减、低杂散的任意波形,输出信号频率范围为1 MHz^30 MHz,幅度峰峰值为40 m V^6.7 V。Aimming at the traditional direct digital frequency synthesis（DDS） algorithm problem of amplitude quantization error, this paper proposed a method to compress the ROM data using a mixed signal symmetry ＋Sunderland structure to increase the amount of ROM, and uses the improved phase jitter injection method to suppress the phase truncation error. The part of hardware, design of amplitude frequency correction circuit to modify the signal, ensured the stability of the output signal amplitude. The test results show that, the signal generator can output arbitrary waveform with high speed, stable, low attenuation, low spurious, frequen- cy range of output signal is 1 MHz-30 MHz,thc amplitude of peak 40 mV^6.7 V.

关 键 词：直接数字频率合成 任意信号发生器 杂散分析 延时抖动法 LC校正电路 

分 类 号：TN91[电子电信—通信与信息系统]