基于FPGA的配电网故障行波采样及降噪设计  

Design of Distribution Network Fault Traveling Wave Sampling and Denoising Based on FPGA

作　　者：史洪华 钟俊[1] 

机构地区：[1]四川大学电气信息学院,成都610065

出　　处：《现代计算机（中旬刊）》2015年第5期74-80,共7页Modern Computer

基　　金：四川省科技支撑项目(No.2011GZ0004);四川省智能电网示范工程关键技术研究(No.2012GZ0009)

摘　　要：行波信号的有效提取是配电网接地故障分析的前提,针对配电线路接地故障,行波信号具有带宽高、背景噪声强的特点,设计以FPGA为主控芯片的行波采样及降噪处理系统。针对行波电压幅值变化大的特点提出双路采集行波方案,采用Verilog HDL编程实现FPGA对AD7626的采样时序控制,并通过FIR数字滤波器对行波信号进行降噪处理,采样数据最终存入RAM中供DSP读取进行定位运算。经过对各模块进行仿真和实际测试,表明该采集系统工作稳定,数据采集准确,降噪后效果理想,具有工程应用价值。Traveling wave signal effective extraction is the precondition of analyzing distribution network grounding fault, in view of the distribution circuit ground fauh, traveling wave signals have the characteristics of high bandwidth and strong background noise, designs traveling wave sampling and denoising processing system which used FPGA as main control chip. According to the characteristics that traveling wave＇s voltage changes big, proposes dual acquisition traveling wave solution, FPGA controlled the AD7626 sampling by using Verilog HDL pro- gramming, and through the FIR digital filter to complete the traveling waves denoising processing, stores the sample data into RAM for DSP to read. Through simulation and actual test, it shows that the acquisition system works stable, collects data accurately, and has good effect after denoising processing, it has the engineering application value.

关 键 词：行波采样 FPGA FIR 降噪 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]