基于DDS与PLL的C波段全相参雷达频综设计  

Design of C-band Full-coherent Frequency Synthesizer Based on DDS&PLL

作　　者：王文才[1] 陈昌明[1] 黄刚[1] 

机构地区：[1]成都信息工程学院通信工程学院,四川成都610225

出　　处：《压电与声光》2015年第3期538-539,共2页Piezoelectrics & Acoustooptics

基　　金：2013年四川省教育厅自然科学重点基金资助项目(13ZA0087)

摘　　要：提出了一种直接数字频率合成(DDS)与锁相环(PLL)相结合的全相参频率合成方案。运用HMC704控制压控振荡器(VCO)设计高性能锁相本振源,将AD9910在基带产生的线性调频(LFM)脉冲调制信号经二次变频搬移到C波段,改善了输出信号的相噪和杂散,降低了系统的复杂性。实现了低相噪,低杂散,窄步进的C波段全相参雷达频综。结果表明,该频综在C波段输出LFM信号的幅度大于10dBm,频率步进为1kHz,相位噪声优于-103dBc/Hz@1kHz,各项指标均满足实际工程要求。A C-band frequency synthesizer sclheme for full-coherent radar combining direct digital synthesis （DDS） and phase-locked loop （PLL） is proposed in this paper. In order to improve the phase noise and spurious of output signal and reduces the system complexity, the high-performance local oscillator is designed by using HMC704 to control VCO, and the base-band LFM signals produced by AD9910 are further up-converted into C-band by two times to meet the required frequency. The synthesizer has implemented with good performance of both low phase noise, high resolution and small step. Experimental results show that the output amplitude of the proposed C-band synthesizer Js greater than 10 dBm, frequency step is 1 kHz, the phase noise level is better than --103 dBc/Hz at 1 kHz,the indicators meet the practical engineering requirements.

关 键 词：C波段 全相参频综 PLL+DDS 线性调频 

分 类 号：TN74[电子电信—电路与系统]