GEM探测器读出电子学ADC采样系统设计  

The Design of the ADC Sampling System Based on the Readout Electronics for GEM Detector

作　　者：杜秋宇 江晓山[1,2] 李绍富[1,2,3] 胡俊[1,2] 张杰[1,2] 陈少佳[1,2] 宁哲[1,2] 

机构地区：[1]核探测与核电子学国家重点实验室,北京100049合肥230026 [2]中国科学院高能物理研究所,北京100049 [3]中国科学院大学,北京100049

出　　处：《核电子学与探测技术》2015年第4期399-402,407,共5页Nuclear Electronics & Detection Technology

基　　金：中国散裂中子源工程(发改高技(2008)2578号)资助

摘　　要：本文简要介绍了GEM探测器读出电子学ADC采样系统设计与测试。该系统包括模数变换模块、数据汇总模块和后端数据接收模块三部分。本文详细介绍了模数变换模块硬件电路设计、FPGA逻辑设计、光纤数据传输设计以及ADC采样芯片的测试方法。经过测试,该系统实现了8通道数据实时采集、传输、存储及显示功能。This article introduces the design and the test of ADC sampling system based on the readout electronics for GEM detector. The system consists of an analog to digital converter module, a data collection module and a backend data receiving module. The analog to digital converter module is presented in detail, including hardware circuit design, FPGA firmware design, optical fiber data transmission design and ADC performance test. After testing, the system implements 8 - channel real - time data sampling, transfer, storage and display, and the system works well.

关 键 词：GEM探测器 ADC性能测试 FPGA 

分 类 号：TP33[自动化与计算机技术—计算机系统结构]