基于临界导通模式的功率因数校正芯片设计  

Design of Power Factor Correction Chip Based on Critical Conduction Mode

作　　者：王彬[1] 高静[1] 张国辉[1] 付园园[1] 徐江涛[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《南开大学学报（自然科学版）》2015年第3期41-48,共8页Acta Scientiarum Naturalium Universitatis Nankaiensis

基　　金：天津市科技支撑计划项目(13ZCZDGX02000)

摘　　要：针对中等功率电器功率因数校正的需要,设计了一种基于临界导通模式的升压型(boost)功率因数校正芯片.该芯片集成可编程过压保护、可编程限流保护等多种保护电路,内设待机功能和自启动电路,通过电压控制环路和零电流检测电路实现了临界导通模式控制策略,固定升压输出.当负载为轻载时,通过将芯片的ZCD引脚接地,从而令芯片进入待机状态,减小了功率损耗.电路采用0.4μm BCD工艺,芯片面积为1.186 mm×1.172mm.仿真结果表明:输入电流接近正弦波并与输入电压同相位,实现了功率因数校正的目的;在12V供电电压下,芯片静态功耗约为31mW.芯片己经成功流片.In order to meet the demand of medium-power devices,a boost power factor correction chip based on critical conduction mode is designed.Along with stand by function and self-start circuit,the designed chip integrated programmable over voltage and over current protection,by combing voltage control loop and zerocurrent detection,critical conduction mode and fixed output voltage can be achieved.Fabricated by 0.4μm BCD technology,the area of the chip is 1.186mm×1.172 mm.According to the simulation results,the input current is actually sinusoidal and keeps in phase with input voltage.Under 12 Vsupply voltage,the static consumption is31 mV.

关 键 词：临界导通模式 升压型 功率因数校正 电压控制环路 零电流检测 

分 类 号：TN432[电子电信—微电子学与固体电子学]