Scheduling Algorithm Based on Storage Capacity of Communication in Hardware/Software Integrated System  

作　　者：滕建辅 蔡晓 张涛 

机构地区：[1]School of Electronic Information Engineering, Tianjin University

出　　处：《Transactions of Tianjin University》2015年第4期366-370,共5页天津大学学报（英文版）

基　　金：Supported by the National Natural Science Foundation of China(No.61179045 and No.61350009)

摘　　要：In this paper, the storage capacity of communication among cores and processors is taken into account and a maximum D-value-first algorithm is proposed. By improving the hardware parallelism in the task execution process, the maximum storage requirements for communication are minimized. Experimental results with various directed acyclic graph models showed that compared with the earliest-task-first algorithm, the storage requirements for communication were reduced by 22.46%, on average, while the average of makespan only increased by 0.82%,.In this paper, the storage capacity of communication among cores and processors is taken into account and a maximum D-value-first algorithm is proposed. By improving the hardware parallelism in the task execution process, the maximum storage requirements for communication are minimized. Experimental results with various directed acyclic graph models showed that compared with the earliest-task-first algorithm, the storage requirements for communication were reduced by 22.46%, on average, while the average of makespan only increased by 0.82%,.

关 键 词：hardware/software partitioning SCHEDULING algorithm STORAGE capacity COMMUNICATION 

分 类 号：TP333[自动化与计算机技术—计算机系统结构] TP301.6[自动化与计算机技术—计算机科学与技术]