EUV光刻技术的挑战  

作　　者：程建瑞 

机构地区：[1]上海微电子装备有限公司 [2]CETC45所

出　　处：《电子工业专用设备》2015年第5期1-12,共12页Equipment for Electronic Products Manufacturing

摘　　要：光刻机的分辨率是基于瑞利分辨率公式R=k1λ/NA,提高分辨率的途径是缩短曝光光源的波长和提高投影物镜的数值孔径。目前主流市场使用的是193 nm浸没光刻机多曝光技术,已经实现16 nm技术节点的集成电路大规模生产。相对于193 nm浸没光刻机双曝光技术,极紫外(波长13.5 nm)光刻技术可以为集成电路的生产提供更高的k1,在提供高分辨率的同时拥有较大的工艺窗口,减小光刻工艺复杂性,是具有很大吸引力的光学光刻技术,预计将在14 nm/11 nm节点进入集成电路批量生产应用。但是,极紫外光刻技术还有包括曝光成像(patterning)、掩模版(mask)、光刻机(scanner)、高功率极紫外光源(source)、极紫外光刻胶、光学系统寿命等挑战需要解决。其中光刻机方面的挑战主要有:光刻机基础平台技术,对焦、剂量与套刻控制技术,光学设计与制造技术,光学测量技术,多层膜技术,波像差、杂散光控制等技术。本文对极紫外光刻的主要挑战技术进行论述。The resolution of a scanner/stepper is base on Rayleigh function R =k1λ/NA, there are two way to decrease the resolution of a optical imaging system,the most efficiency way is to use short exposure wavelength.The main stream chip makers are pushing ArF immersion （ArFi） scanner, which wavelength is 193 nm, consolidated with multi patterning process technology, to manufacture the IC chipswith high volume at 16 nm technology node. Compare with ArFi multi patterning technology, EUV （wavelength is 13.5 nm） lithography can provide better resolution with higher k1 factor, which means a bigger process window, and a simple chip manufacture process. It is a attractive, even the only solution for next chip manufacture technology after 16 nm node. The insertion should be in 2016 at 14 nm/11 nm node. But there are many EUV lithography challenges need to be overcome by industry, these challenges are patterning technology, mask technology, EUV scanner, high power EUV source, EUV resist, lifetime of optics. For the challenges of EUV scanner, the Infrastructure//Characterization, Focus, dose, and overlay control, Image performance, Optics design and fabrication, Optical metrology, Multilayer coatings, Aberrations, flare, and out-of-band light is the key. This presentation will discuss the main of them.

关 键 词：光学光刻技术 极紫外光刻技术 EUV 双曝光技术 大规模生产 高分辨率 集成电路 光学测量技术 

分 类 号：TN305.7[电子电信—物理电子学]