提高RS485总线通信可靠性的优化设计方法  

Optimized design method for enhancing reliable communication of RS485 fieldbus

作　　者：赵亮[1] 张吉礼[2] 

机构地区：[1]大连理工大学电子信息与电气工程学部,辽宁大连116024 [2]大连理工大学建设工程学部,辽宁大连116024

出　　处：《大连理工大学学报》2015年第4期393-398,共6页Journal of Dalian University of Technology

基　　金：中国博士后科学基金资助项目(2015M571306)

摘　　要：以 RS485总线的偏置电阻、终端电阻、网络节点数量3个关键参数为研究对象，建立了等效电路模型。利用 KCL 定律和限流法确定了总线偏置电阻的取值范围为556~716Ω，进一步分析了偏置电阻对终端电阻以及网络节点数量的影响，得到了不同单位负载对应的偏置电阻最佳取值约为670Ω，并确定了对应的总线最大网络节点数量。研究结果可为 RS485总线应用提供理论基础和工程设计指导。The equivalent circuit model of RS485 fieldbus is established based on three key parameters as research objectives,which are bias resistor,terminal resistor and number of network nodes.The value range of bias resistor on the fieldbus is 556-71 6 Ω,which is determined by using the law of KCL and current-limiting method.Furthermore,the influences of bias resistor on the terminal resistor and number of network nodes are analyzed.The best value of about 670 Ω for bias resistor is derived for different unit loads,and the corresponding maximum number of network nodes of fieldbus is determined too.The research results can provide theoretical basis and engineering design guidance for the application of RS485 fieldbus.

关 键 词：RS485 总线 偏置电阻 终端电阻 优化设计 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]