基于AHB-Lite总线的祖冲之密码算法IP核研究  

Research on ZUC Algorithm Reusable IP Core Based on AHB-Lite Bus

作　　者：刘政林[1] 张振华[1] 陈飞[1] 邹雪城[1] 

机构地区：[1]华中科技大学光学与电子信息学院,湖北武汉430074

出　　处：《微电子学与计算机》2015年第8期88-92,共5页Microelectronics & Computer

基　　金：国家自然科学基金项目(61176026;61376026)

摘　　要：目前对祖冲之密码算法的研究大多集中在ZUC算法的优化以及硬件实现上,尚无基于标准总线并包含128-EEA3以及128-EIA3功能的可重用IP(Intellectual Property)核设计方面的研究.设计了基于AMBA AHB-Lite总线结构的祖冲之密码算法IP核,IP核同时包含了128-EEA3和128-EIA3的功能,并基于ARM Cortex-M0DS处理器搭建SOC(System on Chip)对设计进行了验证,最后在Xilinx Spartan6上对系统进行了实现.Currently the researches on ZUC cryptographic algorithm is focus on the algorithm optimization and the hardware implementation.No researches have been conducted on the design of reusable IP（Intellectual Property）core which is based on standard bus and includes the function of 128-EEA3 and 128-EIA3.In this paper,a ZUC algorithm IP core based on the AMBA AHB-Lite bus which includes the function of 128-EEA3 and 128-EIA3 is designed.A SOC based on ARM Cortex-M0 DS processor is built to verify the function of the design and the system is implement on Xilinx Spartan6 board.

关 键 词：祖冲之算法 AHB-Lite总线 可复用IP核 128-EEA3 128-EIA3 

分 类 号：TN4[电子电信—微电子学与固体电子学]