多核处理器中改进的动态缓存优化技术  

Improved Dynamic Cache Optimization Technology in Multicore Processor

作　　者：田进华[1] 魏长宝[1] 

机构地区：[1]黄淮学院信息工程学院,河南驻马店463000

出　　处：《计算机工程》2015年第8期46-51,共6页Computer Engineering

基　　金：河南省科技攻关计划基金资助项目(122102210430);河南省教育厅科学技术研究基金资助重点项目(14B520036)

摘　　要：为提高多核处理器中缓存资源池效率并降低芯片总面积,设计三维多核结构,同时给出在线应用感知作业分配和缓存共享策略。通过分析应用程序性能特征预测资源需求量,将相邻层中具有不同缓存特点的作业分配给三维多核结构内核,使应用程序与缓存用途相匹配,同时根据应用程序对缓存需求度分配缓存资源,实现缓存资源利用率的最大化。实验结果表明,该策略可提高系统性能,降低能耗和芯片面积,与基于静态缓存的三维多核存储器相比,该三维多核结构的能量延迟乘积和能量延迟面积乘积分别提高了36.9%和57.2%。In order to improve the efficiency of cache resource pool and reduce the total chip area in multicore processor,a 3D multicore structure is introduced.This structure implements a runtime application-aware job allocation and cache sharing policy.It improves energy efficiency in 3D multicore structure by providing flexible heterogeneity of cache resources and dynamically allocates job to cores of 3D multicore structure.It pairs applications with contrasting cache use,and partitions the cache resources based on the cache hungriness of the applications.Experimental results demonstrate that the proposed policy improves the system performance,reduces energy consumption and chip area.Compared with 3D multicore processor based on static cache,the proposed 3D structure improves system Energy-delay Product（EDP）and Energy-delay-area Product（EDAP）by up to 36.9% and 57.2%.

关 键 词：缓存资源池 缓存共享 多核处理器 三维多核结构 作业分配 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]