基于cRIO的时序控制软件架构设计  

Architecture of time sequence control software design based on cRIO

作　　者：宋海峰[1,2] 张敏[1,2] 张蓉[1,2] 赵平[1,2] 潘旭东[1,2] 

机构地区：[1]中国工程物理研究院高能激光科学与技术重点实验室,四川绵阳621999 [2]中国工程物理研究院应用电子学研究所,四川绵阳621999

出　　处：《太赫兹科学与电子信息学报》2015年第4期619-624,共6页Journal of Terahertz Science and Electronic Information Technology

摘　　要：面向时序控制的功能需求,基于Compact RIO(c RIO)硬件系统,使用Lab VIEW软件作为编程语言,设计了时序控制软件的程序架构。软件划分为现场可编程逻辑门阵列(FPGA)层和实时(RT)层2个层次,2层之间通过先入先出直接内存访问(DMA FIFO)和前面板控件进行数据通信。时序控制和硬件指令交互功能在FPGA层用状态机实现;RT层实现与上位机的人机交互功能,上报时序流程状态。经测试,时序控制软件的硬件指令响应时间小于50μs。Program architecture is designed to meet the requirements on time sequence control based on Compact RIO and Lab VIEW. According to different requirements on instructions responses, the time sequence control software is divided into two layers:Field Programmable Gate Array(FPGA) layer and Real Time(RT) layer. Data communication is achieved by using Direct Memory Access First-In First-Out(DMA FIFO) and interface widget between the two layers. Function of time sequence control and hardware logical operations are achieved by using state machine in FPGA layer. Human-computer interaction is carried out in RT layer. The state of time sequence is passed to upper level computer. As a result of measurement, hardware operations response time is less than 50 μs.

关 键 词：时序控制 cRIO硬件 架构设计 状态机 消息队列 

分 类 号：TP311.52[自动化与计算机技术—计算机软件与理论]