一种用于提高读写操作的新型8管SRAM单元设计  

A Novel 8T SRAM Cell Design for Improving the Read and Write Operation

作　　者：李颂[1] 孟坚[1] LI Song, MENG Jian （School of Electronics and Information Engineering, Anhui University, Hefei 230601, China）

机构地区：[1]安徽大学电子信息工程学院,安徽合肥230601

出　　处：《电脑知识与技术》2015年第6期254-256,共3页Computer Knowledge and Technology

摘　　要：随着MOS制造工艺的不断发展,晶体管的特征尺寸越来越小,SRAM存储单元对制造工艺的要求也越来越高,功耗问题也越来越突出,该文设计的新型8管采用单个位线来进行读写操作,在两个交叉耦合的反相器之间加入PMOS晶体管来提高写能力。仿真的结果表明：与传统6管和7管相比,这种8管呈现出更好的读噪声容限、写裕度和保持存储数据的能力。As the CMOS process technology is continuingly developing, SRAM cell is more and more susceptive to increased pro-cess variation. The power consumption is becoming an important source. The proposed 8T SRAM cell uses a single-bit line struc-ture to perform read and write operation. The design improves the write ability by breaking-up the feedback loop of the inverterpair. The simulations show the proposed 8T cell offer better read static noise margin and write margin. Besides, the proposed cellhas a significant improvement in HSNM.

关 键 词：新型8管 单个位线读写 静态噪声容限 保持噪声容限 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论;自动化与计算机技术—计算机科学与技术]