魂芯DSP的编译器设计与优化  

Compiler Design and Optimization for BWDSP

作　　者：王向前[1] 洪一[1,2] 王昊[2] 郑启龙 

机构地区：[1]合肥工业大学计算机与信息学院,安徽合肥230009 [2]中国电子科技集团公司第三十八研究所,安徽合肥230088 [3]国科学技术大学计算机科学与技术学院,安徽合肥230027

出　　处：《电子学报》2015年第8期1656-1661,共6页Acta Electronica Sinica

基　　金：国家核高基重大专项(No.2012ZX01034001-001

摘　　要：魂芯DSP是一款字寻址的、分簇结构的、支持SIMD的VLIW处理器.介绍了基于开源编译器基础设施open64开发魂芯编译器的关键技术,包括地址寄存器的优化处理、综合多种启发因子的指令分簇、分簇架构下的寄存器分配和指令调度.介绍了魂芯DSP编译器的体系结构优化关键技术,包括基于依赖分析的向量化、高效指令的使用和零开销循环的识别.并总结开发经验,给出了基于开源编译基础设施开发编译器的若干注意点.BWDSP is a word addressed VLIW DSP supporting clustering and SIMD.Based on open source compiling infrastructure open64 ,key technologies of compiler are developed for BWDSP which consist of optimized processing of address register, instruction clustering combined multi-heuristic factors, register allocation and instruction scheduling on clustering architecture. The key optimization technologies of BWDSP compiler on its hardware architecture include vectorization based on dependence analysis, application of effective instruction and recognization of zero overhead loop. Some general attention points for compiler development based on open source compiler infrastructure are presented after the development experience on BWDSP compiler is summarized.

关 键 词：地址寄存器 分簇 向量化 零开销循环 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]