基于FPGA的误差校正神经网络算法设计与实现  

Design and Implementation of Error Correction Neural Network Algorithm Based on FPGA

作　　者：朱承[1] 

机构地区：[1]重庆电子工程职业学院,重庆401331

出　　处：《电子器件》2015年第4期939-945,共7页Chinese Journal of Electron Devices

摘　　要：为了能够在真实硬件平台上进行实现,对原有的误差校正构造性神经网络算法进行了优化,并对优化后的误差修正算法进行了FPGA设计与实现。提出算法通过在自动生成一个合适的神经架构的同时对二个参数进行设置来提高算法性能。对这种算法实现的所有步骤进行了全面的描述并利用两种基准问题对结果进行了深入分析。结果显示,与标准的基于个人计算机(PC)的实现相比,提出的神经网络算法FPGA实现在计算速度方面有着明显的提高,由此证明了FPGA在误差校正算法神经计算任务中的实用性及适用性。In order to achieve in real hardware platform,the original error correction constructive neural network algorithm is optimized,and the optimized error correction algorithm is implemented based on FPGA. The proposed algorithm improves the performance of the algorithm by a set of two parameters in the automatic generation of a suitable neural architecture. All steps of this algorithm give a comprehensive description and the use of two benchmark issues in-depth analysis of the results. The results show that compared with the implementation based on standard personal computer（ PC） the proposed FPGA implementation of the neural network algorithm in this paper significantly improves the calculation speed,which proved the practicability and applicability of FPGA implementation in the error correction algorithm in neural computing task.

关 键 词：FPGA 构造型神经网络(Co NN) 误差校正 阈值网络 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]