Temperature-dependent bias-stress-induced electrical instability of amorphous indium-gallium-zinc-oxide thin-film transistors  

作　　者：钱慧敏 于广 陆海 武辰飞 汤兰凤 周东 任芳芳 张荣 郑有炓 黄晓明 

机构地区：[1]Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials,and School of Electronic Science and Engineering,Nanjing University [2]Collaborative Innovation Center of Advanced Microstructures,Nanjing University [3]Peter Grnberg Research Center,Nanjing University of Posts and Telecommunications

出　　处：《Chinese Physics B》2015年第7期463-467,共5页中国物理B（英文版）

基　　金：Project supported by the National Basic Research Program of China(Grant Nos.2011CB301900 and 2011CB922100);the Priority Academic Program Development of Jiangsu Higher Education Institutions,China

摘　　要：The time and temperature dependence of threshold voltage shift under positive-bias stress（PBS） and the following recovery process are investigated in amorphous indium-gallium-zinc-oxide（a-IGZO） thin-film transistors. It is found that the time dependence of threshold voltage shift can be well described by a stretched exponential equation in which the time constant τ is found to be temperature dependent. Based on Arrhenius plots, an average effective energy barrier Eτ stress= 0.72 eV for the PBS process and an average effective energy barrier Eτ recovery= 0.58 eV for the recovery process are extracted respectively. A charge trapping/detrapping model is used to explain the threshold voltage shift in both the PBS and the recovery process. The influence of gate bias stress on transistor performance is one of the most critical issues for practical device development.The time and temperature dependence of threshold voltage shift under positive-bias stress（PBS） and the following recovery process are investigated in amorphous indium-gallium-zinc-oxide（a-IGZO） thin-film transistors. It is found that the time dependence of threshold voltage shift can be well described by a stretched exponential equation in which the time constant τ is found to be temperature dependent. Based on Arrhenius plots, an average effective energy barrier Eτ stress= 0.72 eV for the PBS process and an average effective energy barrier Eτ recovery= 0.58 eV for the recovery process are extracted respectively. A charge trapping/detrapping model is used to explain the threshold voltage shift in both the PBS and the recovery process. The influence of gate bias stress on transistor performance is one of the most critical issues for practical device development.

关 键 词：amorphous indium gallium zinc oxide thin-film transistors positive bias stress trapping model interface states 

分 类 号：O484[理学—固体物理]