一种极低静态电流LDO线性稳压器的设计  

Design of ultra-low quiescent current LDO

作　　者：杨学硕 陆铁军[1] 宗宇[1] 

机构地区：[1]北京微电子技术研究所,北京100076

出　　处：《现代电子技术》2015年第20期125-128,共4页Modern Electronics Technique

摘　　要：在此设计一个具有560 n A静态电流、150 m A驱动能力的低压差线性稳压器。该LDO采用TSMC 0.18μm混合信号CMOS工艺,输出电压是3.3 V,输入电压为3.5~5 V。低静态电流LDO电路的设计难点是频率补偿和瞬态响应,这里通过引入一个带有负反馈的动态偏置缓冲器,不仅保证了系统在空载到满载整个负载范围内的稳定性,还极大地改善了低静态电流LDO的瞬态响应问题。仿真结果表明,全负载范围内相位裕度最小为65.8°,同时最大的瞬态响应偏差小于10 m V。A low dropout regulator（LDO）with quiescent current of 560 n A and drive capability of 150 m A was designed.The TSMC 0.18 um mixed-signal CMOS technology is adopted in LDO,whose output voltage is 3.3 V and input voltage is 3.5~5V. The design difficulties of LDO circuit with low quiescent current are frequency compensation and transient response. A dynamic-biasing buffer with negative feedback is introduced to ensure the stability in all load conditions of the system,and improve the transient response of low quiescent current LDO. The simulation results show that the minimum phase margin in all load conditions is 65.8°,and the maximum deviation of transient response is less than 10 m V.

关 键 词：LDO 低静态电流 频率补偿 瞬态响应 

分 类 号：TN43-34[电子电信—微电子学与固体电子学]