基于IP协议的FPGA万兆可靠互联通信设计与实现  

Design and implementation of FPGA 10 Gbit/s reliable interconnect communication based on IP protocol

作　　者：宋宇飞[1] 张俊杰[1] 王凯[1] 李家齐[1] 薛子威 郑玥[1] 

机构地区：[1]上海大学特种光纤与光接入网省部共建重点实验室,上海200444

出　　处：《上海大学学报（自然科学版）》2015年第5期570-578,共9页Journal of Shanghai University:Natural Science Edition

基　　金：上海市科委科技攻关项目(13DZ1108800);上海市科委基金资助项目(11510500500;13JC1402600);国家自然科学基金资助项目(61132004;61275073)

摘　　要：近年来,云计算和大数据处理迅猛发展,现场可编程门阵列(field programmable gate array,FPGA)由于拥有独特的并行处理能力,已在大数据处理中得到广泛应用.而通信网络的好坏会直接影响大数据处理的性能,基于此提出一种基于IP协议的FPGA万兆可靠保序互联通信系统,基于三指针环形缓冲池以及并行序号管理实现线速万兆数据通信,利用硬件超时重传机制实现可靠数据通信.该系统与用户接口采用先进先出(first infirstout,FIFO)队列方式,接口简单;采用IP协议进行通信,使得通信协议开销较小,具有良好的系统扩展性;实际传输速率可达9.33 Gbit/s.In recent years, cloud computing and big data processing have been rapidly developed. Since field programmable gate array （FPGA） has the unique parallel process- ing ability, it is widely used in big data processing. As the performance of communication network directly affects the performance of big data processing, this paper presents a high speed and reliable communication system based on IP protocol for FPGA communications. The system uses a three-pointer ring buffer pool and a method of parallel number manage- ment to achieve data transmission at a line-speed of 10 Gbit/s. By implementing hardware timeout retransmission mechanism, the system can guarantee reliable communications. A self-defined reliable IP protocol is used in the system, which has a small overhead and a good system expansion. Tests on the FPGA hardware platform show that the real data transfer speed can reach 9.33 Gbit/s.

关 键 词：大数据 现场可编程门阵列 互联 通信 

分 类 号：TN914.34[电子电信—通信与信息系统]