卫星导航接收机抗干扰A/D芯片测试技术研究  

Research on Anti-Jamming A/D Chip Measurement Technique for GNSS Receiver

作　　者：郭艺 

机构地区：[1]北京卫星导航中心,北京100094

出　　处：《现代导航》2015年第5期430-435,共6页Modern Navigation

基　　金：国家自然科学基金资助项目(61201257)

摘　　要：卫星导航接收机抗干扰A/D芯片研制在国内尚数初始阶段,因此没有成熟的芯片指标体系和测试方法可供参考,本文针对抗干扰A/D芯片测试技术展开讨论。文中概述了芯片的主要功能和体系架构;根据应用需求建立了相应的测试指标体系;搭建了完整的测试系统,提出了相应的测试方法。本文研究成果应用于实际芯片测试当中,取得了良好的效果,具有重要的工程参考价值。Anti-jamming A/D chip design for GNSS receiver is still in the initial stage in China, so there is no mature chip index system and testing method for reference. The chip testing technology is discussed in this paper. The main function and architecture of the chip are summarized, and the corresponding test index system is established according to the requirement of application, a complete test system is set up and the corresponding test method is put forward. The research results of this paper have been applied to the actual chip test and achieved good results, which has important engineering reference value.

关 键 词：芯片 测试技术 指标体系 测试系统 测试方法 

分 类 号：TN961[电子电信—信号与信息处理]