基于局部动态自重构的微系统芯片低功耗设计研究  

Research on Low-power Micro-System-Chip Design Based on Partial Dynamic Self-Reconfiguration

作　　者：陆振林[1,2] 赵元富[1] 焦烨[1] 韩逸飞[1] 赵光忠[1] 

机构地区：[1]北京微电子技术研究所,北京100076 [2]中国航天电子技术研究院,北京100094

出　　处：《微电子学与计算机》2015年第11期142-146,共5页Microelectronics & Computer

基　　金：科工局民用航天基金(2014537);北京市自然基金(4312016)

摘　　要：针对航天综合电子系统小型化对国产微系统芯片低功耗的设计要求,提出了一种基于局部动态自重构技术的片内动态时钟管理解决方案.分析微系统芯片功耗的构成,确定了以降低芯片动态功耗为切入点,采用集成数字时钟管理单元DCM替换晶振作为加速处理单元DSP芯片的时钟源.根据任务执行需求,应用局部动态重构技术,适时动态调整DSP的工作时钟,以降低空负载下芯片的能量损耗.测试结果表明,所提出的方案在保证实时性的同时,有效地降低微系统芯片的整体功耗.For design demand of downsizing domestic system-on-chip power,which is in order to meet requirement of aerospace electronic system,the dynamic clock management solution based on partial sel-reconfiguration technology is proposed.By analyzing the system-on-chip power composition,reduce the chip dynamic power is determined as the starting point.The integrated digital clock management unit is used as chip clock of accelerated processing unit DSP other than crystal.According to the task execution needs,DSP chip＇s clock is dynamic adjusted to reduce the chip energy loss..The test results indicated that the proposed scheme effectively reduces the power consumption of the system-on-chip and guarantees real-time.

关 键 词：微系统芯片 低功耗 动态时钟 局部动态重构 

分 类 号：TN4[电子电信—微电子学与固体电子学]