有限元网格积分算法在MIC众核平台上的并行实现  

Parallel Implementation of Finite-element Mesh Integration Algorithm on Many Integrated Core

作　　者：寇大治[1] 孔大力[2] 

机构地区：[1]上海超级计算中心,上海201203 [2]埃克塞特大学数学系

出　　处：《计算机科学》2015年第11期56-58,62,共4页Computer Science

基　　金：国家高技术研究发展计划(863)(2012AA01A308);国家自然科学基金(11473014);上海市科学技术委员会科研计划项目(13DZ2294500)资助

摘　　要：基于英特尔集成众核(Many Integrated Core,MIC)架构,将有限元网格积分算法在至强融核(Xeon Phi)协处理器做了移植和性能分析。该应用全面测试了有限元分析的核心计算过程在MIC上的加速效果,实现了卸载模式(offload)[1]下利用OpenMP在MIC上的线程并行化。计算性能测试结果显示集成众核平台可以有效地加速有限元网格积分算法:1)一块被充分利用的MIC设备卡(3115A)的计算能力超过两路16核Intel XeonTM E5-2670CPU;2)MIC并发的物理线程可能由于公共缓存访问存在竞争而降低程序的扩展性。测试结果还显示了在多CPU多MIC平台上进一步移植完整的MPI并行有限元模拟软件的可行性。这项工作有助于推动与有限元网格相关的科学和工程高性能计算的研究。A C＋ ＋ 3-D finite-element mesh integration algorithm was implemented and profiled on a heterogeneous In- tel CPU/MIC architecture. By virtually programing in the offload mode[1] with explicit copies, a sequence of key ele- ment-wise operations are fully parallelized utilizing massive concurrency of OpenMP threads on MIC devices. It is re- markably demonstrated that, in the sense of overall run-time efficiency, one fully employed 3115A MIC card outweighs two 8-core Intel XeonTM E5-2670 CPUs. However, possibly owing to cache contention among physical threads on indi- vidual MIC core, scalability is somehow below an ideal level. Current test unveils a good chance of transplanting a full fi- nite-element analysis code onto a multi-CPU nodes/multi-MIC devices platform based on this single-process multi- thread building block presented here.

关 键 词：集成众核 卸载模式 并行 多线程 有限元 

分 类 号：TP301[自动化与计算机技术—计算机系统结构]