传感器网络应用的低功耗实时计数器  

Low power dissipation real time counter for sensor network application

作　　者：张艺蒙[1] 张玉明[1] 张义门[1] 

机构地区：[1]西安电子科技大学微电子学院,陕西西安710071

出　　处：《西安电子科技大学学报》2015年第6期66-69,112,共5页Journal of Xidian University

基　　金：国家自然科学基金资助项目(61372015)

摘　　要：为降低传感器网络节点的功耗,针对传感器网络应用中传感器节点休眠时间的功耗进行了分析,得出当传感器节点处于休眠状态时,其大部分功耗都是由实时计数器消耗的结论,并提出一种应用在传感器网络、采用电荷可回收逻辑电路结构的低功耗16位实时计数器.采用0.18μm的互补金属氧化物半导体工艺设计并制作了一块样片.实验结果表明,当16位实时计数器的工作频率为100kHz时,新结构的功耗为27nW,而采用传统结构的实时计数器的功耗则为140nW.In sensor network application, to calculate the sleeping time of the sensor nodes, the real time counter is an important part. When the sensor node is in the sleep mode, most of power dissipation is consumed by the real time counter. How to reduce the power dissipation of the real time counter becomes an important research topic to extend the battery life in senor network application. This paper presents a low power dissipation 16-bit real time counter for sensor network application. Charge recovery logic technology is adopted in the real time counter to achieve low power dissipation. To demonstrate the performance of the proposed real time counter, a test chip is designed and fabricated by 0. 18 μm CMOS technology. Experimental results indicate that the proposed real time counter with a charge recovery logic dissipates only 27 nW when working at the frequency of 100 kHz, while the conventional structure of the real time counter dissipates 140 nW in total.

关 键 词：传感器网络 实时计数器 低功耗电路 电荷可回收逻辑电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]