SM3及SHA-2系列算法硬件可重构设计与实现  

Design and Implementation of Hardware Reconfiguration for SM3 and SHA-2 Hash Function

作　　者：朱宁龙[1] 戴紫彬[1] 张立朝[1] 赵峰[1] 

机构地区：[1]解放军信息工程大学,郑州450000

出　　处：《微电子学》2015年第6期777-780,784,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61302107)

摘　　要：针对当前国内外杂凑算法标准和应用需求不同的现状,采用数据流可重构的设计思想和方法,在对SM3及SHA-2系列杂凑算法的不同特征进行分析研究的基础上,总结归纳出统一的处理模型,进而设计了一种新的硬件结构。基于该结构,根据不同环境对杂凑算法安全强度的不同要求,可以单独灵活地实现SM3,SHA-256,SHA-384及SHA-512算法。实验结果表明,设计的硬件电路有效降低了硬件资源消耗,提高了系统吞吐率,能够满足国内外商用杂凑算法的要求。Related to the current situation that the standards and application demands of domestic and foreign hash function are different, an unified processing model was summaried and a novel hardware architecture with the method of data flow reconfiguration was proposed on the basis of analysis on the different characteristics of SM3 and SHA-2 hash algorithms. Based on this architecture, SMa, SHA-256, SHA-384 and SHA-512 hash functions could be achieved separately and flexibly on the same hardware according to different safety demands in different environment. The results showed that the proposed hardware circuit had reduced the resource consumption and improved the system throughput effectively, which could meet the demands of both domestic and foreign hash function encryption.

关 键 词：杂凑算法 SM3 SHA-2 可重构 硬件设计 

分 类 号：TN402[电子电信—微电子学与固体电子学]