64阶FIR滤波器分布式算法优化及实现  

64-order FIR filter distributed arithmetic optimization and its implementation

作　　者：汤巧治[1] 陈双燕[1] 

机构地区：[1]闽南理工学院电子与电气工程系,福建石狮362700

出　　处：《信息技术》2015年第12期67-70,74,共5页Information Technology

基　　金：福建省中青年教师教育科研项目资助(JB13224)

摘　　要：讨论了基于FPGA分布式算法的64阶FIR滤波器设计原理,并详细研究了其改进方案,最后以"全并行分布式算法+查找表分割"方式完成了FIR滤波器的仿真设计。仿真结果表明上述方案能满足64阶FIR滤波器的设计要求。This paper discusses on the 64-order FIR filter design based on the distributed arithmetic of FPGA. And the improvement program of distributed arithmetic is detailed studied. Finally, the simulation design of FIR filter is completed by means of full parallel distributed arithmetic and dividing LUT. The simulation results show that the improvement program meets the design requirements.

关 键 词：FPGA 分布式算法 FIR滤波器 查找表 

分 类 号：TN911[电子电信—通信与信息系统]