基于ADS的三阶电荷泵锁相环的研究及仿真  

Research and simulation of three order charge pump phase-locked loops based on ADS

作　　者：赵雪[1,2] 孙越强[1] 杜起飞[1] 

机构地区：[1]中国科学院空间科学与应用研究中心,北京100190 [2]中国科学院大学,北京100190

出　　处：《电子设计工程》2015年第24期36-39,共4页Electronic Design Engineering

摘　　要：在锁相环的设计过程中,环路带宽的选择是整个设计成功与否的重要一环。为了选取合适的环路带宽,本文以三阶电荷泵锁相环为例,采用ADS软件搭建电路模型进行仿真分析。首先从理论上分析了环路带宽和环路捕获性能、环路输出总相位噪声之间的关系,接着借助ADS软件分别从时域和频域进行仿真,与理论分析结果加以对比,验证了理论分析的正确性,并提出了一种借助仿真结果较为直观的检验环路带宽合理性的方法,本方法对于工程实践具有一定的指导意义。In the process of phase-locked loops design, the selection of loop bandwidth is particularly critical to the success of the entire design. In order to select the reasonable value of loop bandwidth, the three order charge pump phase-locked loops （CPPLL） is taken as an example in this paper. The paper analyzes the relationship between loop bandwidth,the capture performance and the output phase noise in theory, and establishes the simulation model of the three order charge pump phaselocked loops in ADS to prove the theory. At last, a way to check the reasonableness of the loop bandwidth in ADS is proposed. The conclusion provides reference for the design and application of CPPLL.

关 键 词：电荷泵锁相环 三阶环 环路带宽 相位噪声 

分 类 号：TN911.8[电子电信—通信与信息系统]