信道化接收机的结构优化和实现  

The structure optimization and implementation of channelized receiver

作　　者：罗义军[1] 陆冬冬[1] 李勤[2] 

机构地区：[1]武汉大学电子信息学院,湖北武汉430072 [2]武汉大学电气工程学院,湖北武汉430072

出　　处：《电子技术应用》2016年第1期72-74,78,共4页Application of Electronic Technique

摘　　要：为了减少信道化接收机的资源消耗,对低通滤波器组实现信道化接收机的结构进行了研究。在前人将HB滤波器和FIR滤波器设计为多通道并采用时分复用方法的基础上,将NCO和CIC滤波器也做了同样处理,并在FPGA上分别实现了优化前后的两种结构,通过硬件资源消耗情况的对比,验证了此方法的有效性。在输入数据为单一频率正弦波的情况下,将信道化的结果导入Matlab进行分析,验证了此方法的正确性。In order to reduce the hardware resource utilization of channelized receiver,the structure of channelized receiver based on LPF bank is discussed in this paper.Based on the previous study that HB filter and FIR filter are designed in channel multi-plexing,NCO and CIC filter is designed in the same way in the optimized structure.The two scheme before and after optimization are implemented on FPGA respectively,and hardware resource cost are compared to verified the efficiency of this method.The result of channelized processing is analyzed using Matlab with the input of sine wave signal,which proves the validity of the method.

关 键 词：信道化接收机 多通道复用 CIC滤波器 NCO FPGA 

分 类 号：TN914.3[电子电信—通信与信息系统]