A Unified Buffering Management with Set Divisible Cache for PCM Main Memory  

A Unified Buffering Management with Set Divisible Cache for PCM Main Memory

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作  者:Mei-Ying Bian Su-Kyung Yoon Jeong-Geun Kim Sangjae Nam Shin-Dug Kim 

机构地区:[1]Department of Computer Science, Yonsei University, Seoul 120-749, Korea

出  处:《Journal of Computer Science & Technology》2016年第1期137-146,共10页计算机科学技术学报(英文版)

摘  要:This research proposes a phase-change memory (PCM) based main memory system with an effective combi- nation of a superblock-based adaptive buffering structure and its associated set divisible last-level cache (LLC). To achieve high performance similar to that of dynamic random-access memory (DRAM) based main memory, the superblock-based adaptive buffer (SABU) is comprised of dual DRAM buffers, i.e., an aggressive superblock-based pre-fetching buffer (SBPB) and an adaptive sub-block reusing buffer (SBRB), and a set divisible LLC based on a cache space optimization scheme. According to our experiment, the longer PCM access latency can typically be hidden using our proposed SABU, which can significantly reduce the number of writes over the PCM main memory by 26.44%. The SABU approach can reduce PCM access latency up to 0.43 times, compared with conventional DRAM main memory. Meanwhile, the average memory energy consumption can be reduced by 19.7%.This research proposes a phase-change memory (PCM) based main memory system with an effective combi- nation of a superblock-based adaptive buffering structure and its associated set divisible last-level cache (LLC). To achieve high performance similar to that of dynamic random-access memory (DRAM) based main memory, the superblock-based adaptive buffer (SABU) is comprised of dual DRAM buffers, i.e., an aggressive superblock-based pre-fetching buffer (SBPB) and an adaptive sub-block reusing buffer (SBRB), and a set divisible LLC based on a cache space optimization scheme. According to our experiment, the longer PCM access latency can typically be hidden using our proposed SABU, which can significantly reduce the number of writes over the PCM main memory by 26.44%. The SABU approach can reduce PCM access latency up to 0.43 times, compared with conventional DRAM main memory. Meanwhile, the average memory energy consumption can be reduced by 19.7%.

关 键 词:memory hierarchy memory structure cache memory buffer management 

分 类 号:TP332[自动化与计算机技术—计算机系统结构] TP393.4[自动化与计算机技术—计算机科学与技术]

 

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